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 IRFR1N60A, IRFU1N60A, SiHFR1N60A, SIHFU1N60A
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) RDS(on) (Max.) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 14 2.7 8.1 Single
D
FEATURES
600 7.0
* Low Gate Charge Qg Results in Simple Drive Requirement * Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Available
RoHS*
COMPLIANT
* Fully Characterized Capacitance and Avalanche Voltage and Current * Lead (Pb)-free Available
DPAK (TO-252)
IPAK (TO-251)
G
APPLICATIONS
* Switch Mode Power Supply (SMPS) * Uninterruptible Power Supply * Power Factor Correction
S N-Channel MOSFET
TYPICAL SMPS TOPOLOGIES
* Low Power Single Transistor Flyback
ORDERING INFORMATION
Package Lead (Pb)-free SnPb DPAK (TO-252) IRFR1N60APbF SiHFR1N60A-E3 IRFR1N60A SiHFR1N60A DPAK (TO-252) IRFR1N60ATRLPbFa SiHFR1N60ATL-E3a DPAK (TO-252) IRFR1N60ATRPbFa SiHFR1N60AT-E3a IRFR1N60ATRa SiHFR1N60ATa DPAK (TO-252) IRFR1N60ATRRPbFa SiHFR1N60ATR-E3a IPAK (TO-251) IRFU1N60APbF SIHFU1N60A-E3 IRFU1N60A SIHFU1N60A
Note a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted
PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta VGS at 10 V TC = 25 C TC = 100 C SYMBOL VDS VGS ID IDM Energyb LIMIT 600 30 1.4 0.89 5.6 0.28 EAS IAR EAR TC = 25 C PD dV/dt TJ, Tstg for 10 s 93 1.4 3.6 36 3.8 - 55 to + 150 300d W/C mJ A mJ W V/ns C A UNIT V
Linear Derating Factor Single Pulse Avalanche
Repetitive Avalanche Currenta Repetitive Avalanche Energya
Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 C, L = 95 mH, RG = 25 , IAS = 1.4 A (see fig. 12). c. ISD 1.4 A, dI/dt 180 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91267 S-81367-Rev. A, 21-Jul-08 www.vishay.com 1
IRFR1N60A, IRFU1N60A, SiHFR1N60A, SIHFU1N60A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER Maximum Junction-to-Ambient Maximum Junction-to-Ambient (PCB Mount)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJA RthJC TYP. MAX. 110 50 3.5 C/W UNIT
Note a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS TJ = 25 C, unless otherwise noted
PARAMETER Static Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS VGS(th) IGSS IDSS RDS(on) gfs
VGS = 0 V, ID = 250 A VDS = VGS, ID = 250 A VGS = 30 V VDS = 600 V, VGS = 0 V VDS = 480 V, VGS = 0 V, TJ = 150 C VGS = 10 V ID = 0.84 Ab VDS = 50 V, ID = 0.84 A
600 2.0 0.88
-
4.0 100 25 250 7.0 -
V nA A S
Ciss Coss Crss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf
VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V, f = 1.0 MHz VGS = 0 V VDS = 480 V, f = 1.0 MHz VDS = 0 V to 480 VGS = 10 V Vc
-
229 32.6 2.4 320 11.5 130 9.8 14 18 20
14 2.7 8.1 ns nC pF
ID = 1.4 A, VDS = 400 V, see fig. 6 and 13b
-
VDD = 250 V, ID = 1.4 A, RG = 2.15 , RD = 178 , see fig. 10b
-
-
290 510
1.4 A 5.6 1.6 440 760 V ns C
G
S
TJ = 25 C, IS = 1.4 A, VGS = 0 Vb TJ = 25 C, IF = 1.4 A, dI/dt = 100 A/sb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
www.vishay.com 2
Document Number: 91267 S-81367-Rev. A, 21-Jul-08
IRFR1N60A, IRFU1N60A, SiHFR1N60A, SIHFU1N60A
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
10
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
1
TJ = 150 C
1
TJ = 25 C
0.1
4.5V
0.01 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 4.0
V DS = 100V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0
VDS , Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
10
TOP
RDS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
3.0
ID = 1.4A
2.5
2.0
1
1.5
1.0
4.5V
0.5
0.1 1 10
20s PULSE WIDTH TJ = 150 C
100
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
TJ , Junction Temperature ( C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91267 S-81367-Rev. A, 21-Jul-08
www.vishay.com 3
IRFR1N60A, IRFU1N60A, SiHFR1N60A, SIHFU1N60A
Vishay Siliconix
10000
C, Capacitance (pF)
1000
ISD , Reverse Drain Current (A)
V GS = 0V, f = 1MHz C iss = C gs + C gd, C dsSHORTED C rss = C gd C oss = C ds + C gd
10
C iss
100
TJ = 150 C
1
Coss
10
TJ = 25 C
Crss
1 1 10 100 1000
A
0.1 0.4
V GS = 0 V
0.6 0.8 1.0 1.2
V DS , Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
VSD ,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
ID = 1.4A VDS = 480V VDS = 300V VDS = 120V
100
VGS , Gate-to-Source Voltage (V)
OPERATION IN THIS AREA LIMITED BY RDS(on)
16
ID , Drain Current (A)
10 10us
12
8
100us 1 1ms
4
0 0 2 4 6
FOR TEST CIRCUIT SEE FIGURE 13
8 10 12 14
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100
10ms 1000 10000
QG , Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
www.vishay.com 4
Document Number: 91267 S-81367-Rev. A, 21-Jul-08
IRFR1N60A, IRFU1N60A, SiHFR1N60A, SIHFU1N60A
Vishay Siliconix
1.6
VGS RG
VDS
RD
D.U.T. + - VDD
ID , Drain Current (A)
1.2
10 V
Pulse width 1 s Duty factor 0.1 %
0.8
Fig. 10a - Switching Time Test Circuit
0.4
VDS 90 %
0.0 25 50 75 100 125 150
TC , Case Temperature ( C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
10
10 % VGS td(on) tr td(off) tf
Fig. 10b - Switching Time Waveforms
Thermal Response (Z thJC )
D = 0.50 1 0.20 0.10 0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
15 V
VDS tp
VDS
L
Driver
RG 20 V tp
D.U.T IAS 0.01
+ A - VDD
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91267 S-81367-Rev. A, 21-Jul-08
www.vishay.com 5
IRFR1N60A, IRFU1N60A, SiHFR1N60A, SIHFU1N60A
Vishay Siliconix
200
770
EAS , Single Pulse Avalanche Energy (mJ)
160
V DSav , Avalanche Voltage (V)
ID 0.65A 0.9A BOTTOM 1.4A TOP
750
120
730
80
710
40
690
0 25 50 75 100 125 150
670 0.0
A
0.4 0.8 1.2 1.6
Starting TJ , Junction Temperature ( C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current
I av , Avalanche Current (A)
Fig. 12d - Basic Gate Charge Waveform
Current regulator Same type as D.U.T.
50 k 12 V 0.2 F 0.3 F
VGS QGS
QG
QGD D.U.T.
+ -
VDS
VG
VGS
3 mA
Charge
IG ID Current sampling resistors
Fig. 13a - Maximum Avalanche Energy vs. Drain Current
Fig. 13b - Gate Charge Test Circuit
www.vishay.com 6
Document Number: 91267 S-81367-Rev. A, 21-Jul-08
IRFR1N60A, IRFU1N60A, SiHFR1N60A, SIHFU1N60A
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T
+
Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer
+ +
-
RG
* * * *
dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test
+ VDD
Driver gate drive P.W. Period D=
P.W. Period VGS = 10 V*
D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt
VDD
Re-applied voltage Inductor current
Body diode forward drop
Ripple 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91267.
Document Number: 91267 S-81367-Rev. A, 21-Jul-08
www.vishay.com 7
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
www.vishay.com 1


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